The systems and techniques described herein were made in the performance of work under a NASA contract, and are subject to the provisions of Public Law 96-517 (35 USC 202) in which the Contractor has elected to retain title.
This application relates to semiconductor processing, and more specifically, to transfer of a layered structure such as a membrane from one wafer to another wafer.
A semiconductor wafer can be processed to fabricate various structures in an integrated package. Such structures may be formed from fabricating and patterning various layers on the wafer using various microfabrication processes. Each layer may be a semiconductor material, a conductor material such as a doped semiconductor material and a metal, or an insulator such as a glass, an oxide or a nitride. In addition, various micromachining processes may be used to fabricate various micro structures on the wafer. The microfabrication and micromachining processes can be used to fabricate a variety of integrated semiconductor structures to form semiconductor components, devices and systems, including integrated circuits, opto-electronic devices, micro optical devices, and micro-electro-mechanical systems (MEMS).
A layered structure such as a membrane is a common structure in fabricating many semiconductor devices and systems. For example, a silicon or polysilicon membrane parallel to the wafer may be used as an optical mirror. In adaptive optics, such a membrane may be engaged to microactuators to deform in a controlled manner to correct distortions in the wavefront of received optical images. This layered structure may be xe2x80x9cnativelyxe2x80x9d grown by directly forming the layer on the wafer on which the final device is fabricated. Alternatively, it may be advantageous or necessary to fabricate such a layer on a separate substrate and then transfer the layer onto the wafer on which the final device is fabricated.
This application includes techniques for transferring a membrane from one wafer to another wafer to form integrated semiconductor devices. According to one embodiment, a carrier wafer is fabricated to include a membrane on one side of the carrier wafer. The membrane on the carrier wafer is then bond to a surface of a different, device wafer by a plurality of joints. The joints and the device wafer are then isolated from exposure to etching chemicals. Next, the carrier wafer is selectively etched away to expose the membrane and to leave said membrane on the device wafer.